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2f506a Peter van Dijk 2026-01-28 19:04:41 1 
# Nebra Outdoor
f3238b Peter van Dijk 2026-01-28 19:05:57 2
e3ce59 Peter van Dijk 2026-01-29 20:16:55 3
## wio sx1262 board on 'hat' header, for pymc_repeater or meshtasticd/meshcored
120e05 Peter van Dijk 2026-01-28 20:01:07 4
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[![Wio sx1262 (from esp+wio kit) connected to Nebra pin header](./nebra-pinheader-sx1262-photo.jpg?thumbnail=250)](./nebra-pinheader-sx1262-photo.jpg)
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[![pinout note for sx1262 on nebra pin header](./nebra-pinheader-sx1262-pinout-note.jpg?thumbnail=250)](./nebra-pinheader-sx1262-pinout-note.jpg)
0dbaa3 Bram van de Burgt 2026-01-30 18:34:56 7
[![Wiring diagram](./JPEG_image-462F-9A3F-2D-0.jpeg?thumbnail=250)](./JPEG_image-462F-9A3F-2D-0.jpeg)
3b35c1 Bram van de Burgt 2026-01-30 18:43:05 8
[![Wio sx1262 connected to Nebra pin header, with USB cable for wifi](./IMG_6183.jpg?thumbnail=250)](./IMG_6183.jpg)
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120e05 Peter van Dijk 2026-01-28 20:01:07 10
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This pinout is inspired by/compatible with the [Zebra Hat](https://github.com/wehooper4/Meshtastic-Hardware/tree/main/ZebraHAT). The Zebra Hat is different from other LoRa hats because it considers the limited number of actually connected pins in the Nebra miner. By being compatible with that board, after connecting all the wires, [pyMC_Repeater](https://github.com/rightup/pyMC_Repeater) just works when picking the Zebra Hat board type.
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Full pinout description (you can use [pinout.xyz](https://pinout.xyz/pinout/spi) instead of the second photo above):
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769cae Peter van Dijk 2026-01-28 20:08:32 15
| SX1262 pin | Nebra/Pi GPIO number | Nebra/Pi pin name | Nebra/Pi pin number |
16
| -------- | -------- | -------- | -------- |
17
| GND | - | Ground | 9 or [some other ground pin](https://pinout.xyz/pinout/ground) |
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| RST | 17 | GPIO 17 | 11 |
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| BUSY | 27 | GPIO 27 | 13 |
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| DIO1 | 22 | GPIO 22 | 15 |
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| 3V3 | - | 3v3 Power | 17 or 1 |
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| MOSI | 10 | SPI0 MOSI | 19 |
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| MISO | 9 | SPI0 MISO | 21 |
24
| SCK | 23 | SPI0 SCLK | 23 |
25
| NSS | 24 | GPIO 24 | 18 |
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If you use 17 and 9 for 3V3 and GND, all pins are in a single straight line except for the NSS one on GPIO24.
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SX1262 RF_SW, VIN, and pins like D5, D6, D7, do not need to be connected.
120e05 Peter van Dijk 2026-01-28 20:01:07 29
132341 Bram van de Burgt 2026-01-30 18:32:53 30
During pyMC_Repeater install, select the first radio config, then in `/etc/pymc_repeater/config.yaml` set this config and restart the service:
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```
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sx1262:
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# SPI bus and chip select
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bus_id: 0
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cs_id: 0
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# GPIO pins (BCM numbering)
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cs_pin: 24
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reset_pin: 17
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busy_pin: 27
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irq_pin: 22
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# TX/RX enable pins (-1 to disable)
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txen_pin: -1
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rxen_pin: -1
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# LED pins for TX/RX indication (-1 to disable)
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txled_pin: -1
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rxled_pin: -1
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use_dio3_tcxo: true
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tx_power: 18
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# Waveshare hardware flag
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is_waveshare: false
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```
f2707f Bram van de Burgt 2026-01-30 19:05:01 52
[Source](https://github.com/wehooper4/Meshtastic-Hardware/blob/main/ZebraHAT/readme.md#meshcore-usage)
132341 Bram van de Burgt 2026-01-30 18:32:53 53
f2707f Bram van de Burgt 2026-01-30 19:05:01 54
In `/etc/pymc_repeater/config.yaml` you can add this to make the repeater only monitor but not forward on startup:
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```
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repeater:
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mode: monitor
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```
132341 Bram van de Burgt 2026-01-30 18:32:53 59
e3ce59 Peter van Dijk 2026-01-29 20:16:55 60
This setup also [works](https://github.com/meshcore-dev/MeshCore/pull/1137#issuecomment-3819952554) with [meshcored](https://github.com/meshcore-dev/MeshCore/pull/1137) with this `meshcored.ini` snippet:
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```
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lora_irq_pin = 22
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lora_reset_pin = 17
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lora_nss_pin = 24
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lora_busy_pin = 27
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```
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f3238b Peter van Dijk 2026-01-28 19:05:57 69
# unsorted notes, to be sorted
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via https://helium.nebra.com/datasheets/hotspots/outdoor/Nebra%20Outdoor%20Hotspot%20Datasheet.pdf
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has two:
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> Lora Module Connector - Designed for use with select M-PCIE LoRa Concentrators, these only have wired up SPI, plus GPS PPS from the GPS Module
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it also has one slot with just USB wired up (and the SIM and ....)
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But now I wonder if we can replace the entire Pi CM(3) daughterboard with some esp or nrf plus semtech 1262 kit to even avoid the power draw of a pi - depending on use case, of course. Answer: we can remove the cm3 and still get all power pins.
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https://github.com/wehooper4/Meshtastic-Hardware/tree/main/NebraHat
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https://github.com/wirenboard/atecc-util
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https://github.com/pinztrek/nebra-hnt-meshtasticd - mentioned waveshare board might be https://www.waveshare.com/sx1262-868m-lora-hat.htm, also https://m.youtube.com/watch?v=hJv9Xv6PUJ4 plus https://www.youtube.com/watch?v=OrHVr8An9Io
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https://meshtastic.org/blog/a-major-solution-to-a-miner-problem/
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### usb hub (bt/wifi) daughter board
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appears to get usb over an actual usb cable from a usb port on the mainboard. the 40 pin header only appears to have a few pins connected:
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* 1 (3v3), going to ECC1 and other things
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* 22 (gpio25, going to LED1)
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* 17? going to a button
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* two more low-numbered pins going to ECC1, probably 2 (I2C1 SDA) and 3 (I2C1 SCL)
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### exar ethernet/i2c/gpio
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```
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Bus 001 Device 005: ID 04e2:1300 Exar Corp. XR2280x 10/100 Ethernet
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Bus 001 Device 006: ID 04e2:1100 Exar Corp. XR2280x I2C Controller
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Bus 001 Device 007: ID 04e2:1200 Exar Corp. XR2280x GPIO Controller
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```
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### power draw
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each section here is an incremental change from the previous one
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#### stock miner, BT dongle removed, heltec v3 plugged in
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5-7W
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```
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peter@tabantha:~ $ lsusb -t
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/: Bus 001.Port 001: Dev 001, Class=root_hub, Driver=dwc_otg/1p, 480M
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|__ Port 001: Dev 002, If 0, Class=Hub, Driver=hub/4p, 480M
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|__ Port 001: Dev 003, If 0, Class=Hub, Driver=hub/7p, 480M
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|__ Port 001: Dev 005, If 0, Class=Communications, Driver=cdc_ether, 480M
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|__ Port 001: Dev 005, If 1, Class=CDC Data, Driver=cdc_ether, 480M
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|__ Port 006: Dev 006, If 0, Class=Human Interface Device, Driver=usbhid, 480M
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|__ Port 007: Dev 008, If 0, Class=Human Interface Device, Driver=usbhid, 480M
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|__ Port 003: Dev 004, If 0, Class=Hub, Driver=hub/4p, 480M
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|__ Port 001: Dev 007, If 0, Class=Vendor Specific Class, Driver=rtl8xxxu, 480M
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|__ Port 002: Dev 009, If 0, Class=Vendor Specific Class, Driver=cp210x, 12M
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```
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#### remove wifi
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4W
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```
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peter@tabantha:~ $ lsusb -t
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/: Bus 001.Port 001: Dev 001, Class=root_hub, Driver=dwc_otg/1p, 480M
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|__ Port 001: Dev 002, If 0, Class=Hub, Driver=hub/4p, 480M
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|__ Port 001: Dev 003, If 0, Class=Hub, Driver=hub/7p, 480M
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|__ Port 001: Dev 005, If 0, Class=Communications, Driver=cdc_ether, 480M
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|__ Port 001: Dev 005, If 1, Class=CDC Data, Driver=cdc_ether, 480M
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|__ Port 006: Dev 006, If 0, Class=Human Interface Device, Driver=usbhid, 480M
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|__ Port 007: Dev 008, If 0, Class=Human Interface Device, Driver=usbhid, 480M
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|__ Port 003: Dev 004, If 0, Class=Hub, Driver=hub/4p, 480M
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|__ Port 002: Dev 007, If 0, Class=Vendor Specific Class, Driver=cp210x, 12M
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```
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#### remove heltec
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4-5W
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```
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peter@tabantha:~ $ lsusb -t
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/: Bus 001.Port 001: Dev 001, Class=root_hub, Driver=dwc_otg/1p, 480M
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|__ Port 001: Dev 002, If 0, Class=Hub, Driver=hub/4p, 480M
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|__ Port 001: Dev 003, If 0, Class=Hub, Driver=hub/7p, 480M
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|__ Port 001: Dev 005, If 0, Class=Communications, Driver=cdc_ether, 480M
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|__ Port 001: Dev 005, If 1, Class=CDC Data, Driver=cdc_ether, 480M
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|__ Port 006: Dev 006, If 0, Class=Human Interface Device, Driver=usbhid, 480M
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|__ Port 007: Dev 008, If 0, Class=Human Interface Device, Driver=usbhid, 480M
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|__ Port 003: Dev 004, If 0, Class=Hub, Driver=hub/4p, 480M
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```
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#### remove usb daughterboard (the one with bt/wifi labels on it) from pin header
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3.5-6W
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```
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peter@tabantha:~ $ lsusb -t
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/: Bus 001.Port 001: Dev 001, Class=root_hub, Driver=dwc_otg/1p, 480M
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|__ Port 001: Dev 002, If 0, Class=Hub, Driver=hub/4p, 480M
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|__ Port 001: Dev 003, If 0, Class=Hub, Driver=hub/7p, 480M
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|__ Port 001: Dev 005, If 0, Class=Communications, Driver=cdc_ether, 480M
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|__ Port 001: Dev 005, If 1, Class=CDC Data, Driver=cdc_ether, 480M
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|__ Port 006: Dev 006, If 0, Class=Human Interface Device, Driver=usbhid, 480M
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|__ Port 007: Dev 007, If 0, Class=Human Interface Device, Driver=usbhid, 480M
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|__ Port 003: Dev 004, If 0, Class=Hub, Driver=hub/4p, 480M
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```
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#### also remove it from usb socket
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```
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peter@tabantha:~ $ lsusb -t
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/: Bus 001.Port 001: Dev 001, Class=root_hub, Driver=dwc_otg/1p, 480M
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|__ Port 001: Dev 002, If 0, Class=Hub, Driver=hub/4p, 480M
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|__ Port 001: Dev 003, If 0, Class=Hub, Driver=hub/7p, 480M
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|__ Port 001: Dev 005, If 0, Class=Communications, Driver=cdc_ether, 480M
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|__ Port 001: Dev 005, If 1, Class=CDC Data, Driver=cdc_ether, 480M
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|__ Port 006: Dev 006, If 0, Class=Human Interface Device, Driver=usbhid, 480M
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|__ Port 007: Dev 007, If 0, Class=Human Interface Device, Driver=usbhid, 480M
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```
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#### pop cm3 out of socket
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1.5-3W
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#### connect usb daughterboard back (just on usb, not pin header), with heltec connected to it
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3.5W (the heltec works)
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#### remove everything that is unpluggable
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unifi refuses to measure
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#### plug heltec in mainboard usb socket
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heltec works.
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unifi refuses to measure
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#### insert minipcie usb adapter board from aliexpress, move heltec to it
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heltec works. no unifi measurement.
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#### put back cm3 carrier with cm3 module and eMMC key
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4W
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heltec works, serial to it works.
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```
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peter@tabantha:~ $ lsusb -t
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/: Bus 001.Port 001: Dev 001, Class=root_hub, Driver=dwc_otg/1p, 480M
224
|__ Port 001: Dev 002, If 0, Class=Hub, Driver=hub/4p, 480M
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|__ Port 001: Dev 003, If 0, Class=Hub, Driver=hub/7p, 480M
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|__ Port 001: Dev 005, If 0, Class=Communications, Driver=cdc_ether, 480M
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|__ Port 001: Dev 005, If 1, Class=CDC Data, Driver=cdc_ether, 480M
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|__ Port 006: Dev 006, If 0, Class=Human Interface Device, Driver=usbhid, 480M
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|__ Port 007: Dev 007, If 0, Class=Human Interface Device, Driver=usbhid, 480M
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|__ Port 002: Dev 004, If 0, Class=Vendor Specific Class, Driver=cp210x, 12M
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```
032010 Peter van Dijk 2026-01-28 23:19:46 232
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# nebra miner minipcie pin count
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[Nebra](https://github.com/NebraLtd/nebra-lora-hardware/blob/master/Smart-Outdoor-Mainboard-V1/HARDWARE/Pi%20Supply%20Smart%20LoRa%20Gateway%20Schematic.pdf) gives us, per minipcie slot, SCLK+MISO+MOSI+CE+RST. [lora-pipe config.h](https://github.com/folkertvanheusden/lora-pipe/blob/master/config.h) suggests we want SCLK+MISO+MOSI (+CE but maybe we can get away without it)+DIO1(interrupt)+RST. We also need BUSY, for a total of 7 pins. If we hardware CE to always be on, we free up one pin, giving us exactly enough to put DIO0+RST on? Turns out this is "not legal". One more pin if we can abuse GPS_PPS but I don't think we can (or if we can, it would still be shared between the two lora minipcie slots).
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From `hpux735` on the meshcore discord: how about an i2c port expander? 5 pins fits SCLK/MISO/MOSI and all of I2C. You'd have to poll the IRQ. (Or maybe if I'm polling anyway, who needs the IRQ).
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From `Mike's Allotment` on the meshcore discord: UART module instead of SPI?
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Full pin list:
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* SCLK
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* MISO
245
* MOSI
246
* CE
247
* IRQ
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* BUSY
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* RST
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Wired pins on Nebra:
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* SCLK
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* MISO
255
* MOSI
256
* CE
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* RST
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What if CE, when disasserted, makes BUSY readable on the RST pin, and when asserted, makes RST writable on the RST pin? I wonder what RST with CE asserted means.
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MISO is inactive when CE is off, and CE is always off if BUSY is on.
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What if KISS (TNC) over SPI, or UART bitbang, with a simple MCU.
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What if SPI but something is interposing/reading along to pick up a special frame that means RESET. Then we can reuse the RST pin for BUSY. IRQ was always optional.
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https://github.com/thekakester/Arduino-LoRa-Sx1262/blob/main/src/LoraSx1262.cpp#L230 -suggests- that BUSY can be inferred from GetStatus. This seems to be right for "Transmission is done" but I'm unsure it works for all busy reasons.
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https://www.haraldkreuzer.net/en/news/LoRa-with-the-ESP32-and-Semtech-SX1262 is a very good page that tells us that TxDone and RxDone can be polled instead of IRQed.